86 design verification engineer jobs at 43 companies in Lawrence, MA
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Staff Engineer, Design Verification Engineering
Wilmington, Massachusetts, United States
$172k-$210k/yr HybridFull Time
4+ YOEMaster's+4yrs or Bachelor's+6yrs in relevant engineering; experience with System Verilog and UVM, metric-driven verification, simulation debug, IP/VIP integration, verification planning, and scripting for automation.
UVM, System Verilog
1mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
1d
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Design Verification Engineer
Waltham, Massachusetts, United States
OnsiteFull Time
Responsible for verifying the functionality and performance of Apple's system-on-chip products; the posting does not specify education, certifications, or experience requirements.
3w
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Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
3+ YOEBachelor's with 5+ years or Master's/PhD with 3+ years in digital design/verification; expertise in UVM, constrained-random verification, SVA, RTL debug; C/C++ and scripting (Python/Perl); Linux experience.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), C, C++, Python, Perl, Linux
16h
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SOC Design Verification Lead
Boxborough, Massachusetts, United States
$175k-$300k/yr HybridFull Time
5+ YOESeasoned SoC design verification and infrastructure architect with testbench architecture, verification methodology, project execution, and SoC architecture expertise; UVM, C++, SystemVerilog, GitHub Copilot, and Cursor experience preferred.
UVM, C++, SystemVerilog, GitHub Copilot, Cursor
2mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE or related,5+ years hardware verification experience with SystemVerilog/UVM,experience with industry EDA tools,US citizenship and active Secret clearance required,ability to travel up to 10%.
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, AMD/Xilinx Vivado, Altera Quartus, Microchip Libero, TCL, Perl, Python, Linux
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Design Verification Engineer, PLM
Portsmouth, New Hampshire, United States
OnsiteFull Time
2+ YOEBachelor's in engineering and 2+ years experience in design, development, and testing; knowledge of design control, validation, and regulatory standards; proficiency with test documentation and engineering change processes.
Azure DevOps, JIRA, Greenlight Guru, SAP
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Senior Staff Design Verification Engineer – Coherent Interconnect
Boston or Austin
OnsiteFull Time
8+ YOE8+ years ASIC/SoC design verification experience, strong SystemVerilog and Python skills, deep knowledge of cache-coherent interconnects and protocols (CHI, ACE, CXL, AXI), BS/MS in EE/CE/CS, strong communication and leadership.
SystemVerilog, Python
4w
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Design Verification Engineer – Physical AI Compute
Santa Clara or Austin or Boston
$75k-$275k/yr OnsiteFull Time
Experience verifying complex digital/SoC systems with SystemVerilog/UVM, C/C++, assertions, formal, emulation and debugging across HW/SW boundaries.
SystemVerilog, UVM, C, C++, formal verification, emulation, FPGA
2mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Nashua or Manchester or Largo or New Hampshire or Florida or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree (or equivalent) with 8+ years experience; ability to obtain Secret clearance; expertise in SystemVerilog/UVM, OVM, VHDL, FPGA/ASIC verification and tools; experience with Mentor Questa or Cadence; strong communication and leadership.
SystemVerilog/UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, MATLAB, Simulink
1mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
2mo
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Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
3mo
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Design Verification Test (DVT) Manager
Derry, New Hampshire, United States
$125k-$140k/yr OnsiteFull Time
5+ YOE3+ MgmtBachelor's in engineering; 5 years product validation/certification; 3+ years management in test/verification; knowledge of safety design/test; experience with certifications (UL) and ISO; create test processes/reports; support factory releases.
2mo
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Mechanical Design Engineer
Hudson, Massachusetts, United States
$80k-$100k/yr OnsiteFull Time
5+ YOEBachelor's in Mechanical Engineering (ABET), 5+ years mechanical design experience, 3+ years SolidWorks, COSMOS experience preferred, heavy-structure and subsystem design, vendor sourcing, verification and validation.
SolidWorks, COSMOS
1d
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Austin or Westford or Durham or California
$136k-$265k/yr HybridFull Time
5+ YOEBachelor's or master's degree in engineering or computer science, 5+ years' experience, ASIC workflows, UVM, Verilog/SystemVerilog, simulation tools, and Python, Perl, or systems programming.
Python, Perl, Verilog, SystemVerilog, UVM, VCS, Verdi, Xcelium
3w
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Mechanical Design Engineer (1866)
Westborough, Massachusetts, United States
$85k-$110k/yr HybridFull Time
0+ YOEMechanical engineering degree or equivalent, 0–4 years preferred; experience with 3D modeling, FEA/CFD, thermal analysis, manufacturing processes, drafting standards, GD&T, and design verification.
SolidWorks, Pro/ENGINEER (Creo), CATIA, FEA, CFD, 3D printers, ANSI/ASME Y14.5M, GD&T, IEC 60529
2d
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Material Verification Engineer
Manchester, New Hampshire, United States
$87k-$165k/yr OnsiteFull Time
5+ YOEBachelor’s degree in STEM and 5 years of engineering experience in quality, or advanced degree and 3 years; 9+ years without degree. Requires RCCA, design analysis, U.S. citizenship, and active Secret clearance.
PRISM, WaveTrak, RCAS, RTX CORE
1d
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Westford or Austin or Durham or California
$136k-$265k/yr OnsiteFull Time
5+ YOEBS/MS or equivalent experience; 5+ years relevant experience; ASIC workflows, UVM, Verilog/SystemVerilog, simulation/debug tools, Python or Perl, and root-cause analysis skills required.
UVM, Verilog, SystemVerilog, VCS, Verdi, Xcelium, Python, Perl
1mo
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Engineer: Sr. Electrical Design Engineer
Cambridge, Massachusetts, United States
$80k-$110k/yr OnsiteFull Time
5+ YOEMaster's in EE, 5+ years product development experience, PCB and embedded hardware design, Altium/Eagle, C/Assembly, verification/validation, FDA/ISO 13485 experience, LabVIEW/MATLAB/Simulink familiarity.
Altium, Autodesk Eagle, C, Assembly, Verilog, VHDL, FPGA, ASIC, LabVIEW, MATLAB, Simulink, Java, Android, oscilloscopes, logic analyzers
4w
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Senior Optical Design Engineer
Newington, New Hampshire, United States
OnsiteFull Time
8+ YOEMaster's in Optical/Electrical Engineering or Physics, 8+ years optical systems experience, expertise in fiber optics and optical test methods, modeling and prototyping, EDFAs, verification and reliability testing, strong communication and leadership.
LabWindows/CVI
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