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30 verification engineer jobs at 9 companies in Lodi, CA

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ASIC Senior Verification Engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Providing global edge-to-cloud infrastructure and IT solutions for businesses.
10+ YOESenior verification engineer with 10+ years in VLSI design/verification; strong Verilog/SystemVerilog, UVM; scripting (Python, Perl, TCL); C/C++; leadership.
Verilog, SystemVerilog, UVM, Python, PERL, TCL, C, C++, Specman
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SMTS Design Verification Engineer
Minneapolis or Boise or Folsom or Richardson or San Jose
$178k-$389k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Manufacturer of semiconductor memory and data storage products.
6+ YOEBS/MS/PhD in EE/CE or related; 6+ years UVM/SystemVerilog functional verification; experience building UVM testbenches, coverage-driven methodology, protocol/interface verification, RTL/testbench debug, and post-silicon bring-up support.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), JasperGold, VC Formal, Verilog-AMS, Real-number modeling (RNM), ATE
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Staff Engineer - ASIC Verification
San Jose or Folsom
$145k-$286k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
6+ YOEBS in electrical engineering or computer science; 6-8 years verification; RTL debugging, scoreboarding, and code coverage; test plans and coverage definitions.
SystemVerilog, UVM, C, DDR, PCIe/NVMe, NAND
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ASIC Senior Verification Engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides global edge-to-cloud technology solutions and IT infrastructure services.
10+ YOE10+ years in VLSI design/verification; Verilog/SystemVerilog; UVM; Python, TCL, PERL or similar; C/C++; Bachelor’s or Master’s in Electrical or Computer Engineering.
Verilog, SystemVerilog, UVM, Python, C, C++, Specman, TCL, PERL
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Senior ASIC verification engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides edge-to-cloud IT infrastructure and platform services.
10+ YOEBachelor's degree in EE/CE, 10+ years VLSI design/verification experience, proficiency in Verilog/SystemVerilog, UVM, scripting (Python, Perl, Tcl), C/C++, strong VLSI architecture and leadership skills.
Python, Perl, Tcl, C, C++, Verilog, SystemVerilog, UVM, Specman, Electronic Design Automation (EDA), FPGA tools
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IP Design Verification Engineer
Folsom, California, United States
$106k-$149k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
3+ YOEExperience with Verilog/VHDL/SystemVerilog, C/C++/Python, FPGA/emulation, hardware/software debug, computer architecture knowledge; Bachelor's+3yrs or Master's+1yr in electronics/computer engineering.
Verilog, VHDL, SystemVerilog, C, C++, Python, FPGA, VCS, Verdi, DVE, OVM/UVM, logic analyzers, oscilloscopes, protocol analyzers, IA-Core Assembly
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3w
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Digital Verification Engineer - Weapon Subsystems 2
Albuquerque or Livermore or United States
$122k-$238k/yr HybridFull Time, Temporary
Sandia National Laboratories
Sandia National Laboratories: Conducts science and engineering research for national security.
Bachelor's in relevant discipline (or equivalent experience), ability to obtain DOE Q-level clearance, expertise in formal verification, VHDL/Verilog/SVA proficiency, strong analytical and written communication skills.
VHDL, Verilog, SystemVerilog Assertions (SVA)
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Digital Verification Engineer - Weapon Subsystems 2
Livermore or California or New Mexico or United States
$122k-$238k/yr HybridFull Time, Temporary
Sandia National Laboratories
Sandia National Laboratories: Federal research and development laboratory for national security.
Bachelor's degree or equivalent, ability to obtain DOE Q-level (Top Secret) clearance, several years applying formal verification to FPGA/ASIC, proficiency with VHDL, Verilog, and SystemVerilog Assertions (SVA), strong analytical and written communication skills.
VHDL, Verilog, SystemVerilog Assertions (SVA)
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3w
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Test Engineer
Byron, California, United States
$118k-$190k/yr OnsiteFull Time
Elroy Air
Elroy Air: Builds autonomous vertical takeoff and landing aircraft for cargo logistics.
2+ YOEBachelor's in engineering, 2+ years test experience in hardware verification or lab testing, hands-on with propulsion/battery/EV systems, DAQ (National Instruments, Dewesoft), proficiency with Python, MATLAB, or LabVIEW, and strong troubleshooting and reporting skills.
National Instruments, Dewesoft, Python, MATLAB, LabVIEW, CAD, DAQ, HIL
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Principal Systems Design Engineer
Folsom, California, United States
$175k-$300k/yr OnsiteFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
10+ YOEBachelor's in electrical or computer engineering with 10+ years of experience; strong hardware/software systems design, verification, and leadership skills.
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Sr. Electrical Engineer, Connected Systems & Combination Product Development, R&D
Pleasanton, California, United States
$125k-$237k/yr HybridFull Time
AbbVie
AbbVieNYSE: ABBV: Develops and sells innovative pharmaceutical and biopharmaceutical medicines.
8+ YOEBS in Electrical Engineering (10+ yrs) or MS (8+ yrs) in related discipline; experience with medical devices/combination products, wireless connectivity, embedded systems, verification/validation, and cross-functional collaboration.
IoT, AI, Bluetooth, Wi-Fi, NFC, NB-IoT, SPI, I2C, UART, USB
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Tech Staff Engineer - Firmware
Roseville, California, United States
$88k-$232k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNASDAQ: MCHP: Designs and manufactures microcontrollers and mixed-signal semiconductor solutions.
10+ YOEBS/MS in CS/CE or equivalent, 10+ years embedded systems development and verification, strong C/C++/Python, experience with PCIe/NVMe, secure boot/security firmware, leadership and documentation skills.
C, C++, Python, Rust, ARM Architecture, NVMe, PCIe, Caliptra Open-Source Root-of-Trust, Cadence Palladium, Cadence Protium, Bus/Logic Analyzers, PCIe Exercisers, Git, Perforce, JIRA, Linux, Perl, Agile Scrum, DevOps, Secure Development Life Cycle
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4w
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IP Logic Design Engineer
Rancho Cordova, California, United States
$105k-$165k/yr OnsiteFull Time
Solidigm
Solidigm: Develops and manufactures NAND flash memory and solid-state drives.
7+ YOEMS in ECE with 7+ years or BS with 9+ years; expertise in Verilog/SystemVerilog and ASIC flow (RTL, synthesis, STA, ECO); experience with lint, CDC/RDC analysis, verification tools, scripting, and pre/post-silicon debug; 3D NAND experience preferred.
SystemVerilog, Verilog, RTL, synthesis, Static Timing Analysis (STA), ECO, lint tools, CDC/RDC analysis, SystemVerilog Assertions (SVAs), Gate-level simulation (GLS), Design for Testability (DFT)
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