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47 asic engineer jobs at 11 companies in Temecula, CA

3mo
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ASIC Design Engineer
Irvine or Andover
$108k-$173k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
6+ YOEBachelor's in Electrical Engineering with 8+ years of related experience or Master's in Electrical Engineering with 6+ years of related experience; ASIC implementation, synthesis, DFT, floorplanning, place & route, clocking, power planning and analysis, timing closure, signal integrity, physical design checks.
EDA tools, Synthesis tools, Place and Route (P&R) tools, Floorplanning tools, Clocking/Timing analysis tools, Power analysis tools
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1mo
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Sr. ASIC DFT Engineer (Silicon)
Irvine or Austin or Sunnyvale
$125k-$150k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
5+ YOEBachelor's in engineering or physics; 5+ years in DFT/semiconductor testing; strong ASIC/DFT/ATE expertise.
Siemens Tessent, ATPG, Teradyne, Advantest, Perl, Python, Tcl, C++, IEEE 1500, IEEE 1687, IST
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2mo
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ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal
El Segundo or Huntington Beach
OnsiteFull Time
Boeing
BoeingNYSE: BA: Designing and manufacturing commercial aircraft and defense systems.
5+ YOEBachelor's degree in engineering or related field; experience in ASIC/FPGA verification; SystemVerilog/UVM; HDL proficiency; testbenches, coverage models, and regression testing experience.
SystemVerilog, UVM, HDL, Verilog, Python, Make, Perl, Git, SV Assertions
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2mo
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Senior Principal Engineer Digital ASIC Design/Manager
San Diego, California, United States
$214k-$348k/yr OnsiteFull Time
Kyocera
KyoceraTokyo Stock Exchange: 6971: Manufactures advanced ceramic components and high-tech electronic equipment.
15+ YOEBS or MS in Electrical Engineering; 15 years in Digital ASIC design; leadership; cross-functional collaboration; RTL/verification; experience with mixed-signal interfaces is a plus.
Verilog, SystemVerilog, LINT, LEC, RDC/CDC, SDF, Genus, Conformal, Innovus, Spyglass Lint, TetraMax, Xcelium, Cadence, Synopsys PrimeTime, VCS, UGV, UVM
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3mo
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ASIC Design Verification Technical Leader
Carlsbad or Allentown
$164k-$235k/yr OnsiteFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
8+ YOEBachelor's or higher in Electrical/Computer Engineering; 8+ years ASIC design verification or 6+ with masters; strong SystemVerilog/UVM; leadership experience; scripting (Python, Perl, TCL, Shell).
SystemVerilog, UVM, Python, Perl, TCL, Shell
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1mo
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Senior Principal Engineer, Architecture ASIC / System
Toronto or Ottawa or Burlington or Irvine or Morrisville or Santa Clara or Westborough
$192k-$255k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
14+ YOESenior architect with 14+ years in system architecture for SoC; expertise in interconnects, memory hierarchies, power management, security; strong technical leadership.
IP evaluation, IP block, SoC architecture
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Digital Design Principal Engineer/Manager
Irvine, California, United States
$190k-$225k/yr OnsiteFull Time
InnoPhase
InnoPhase: Designing energy-efficient semiconductor solutions for 5G cellular networks.
20+ YOE20+ years FPGA/SoC development with leadership experience; MS in Electrical Engineering; deep Verilog/SystemVerilog expertise; FPGA/ASIC implementation and packet processing experience; scripting in C/C++, Perl, Tcl, Python.
Verilog, SystemVerilog, AMD (Xilinx Vivado), C, C++, Perl, Tcl, Python, Claude Code, Copilot
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1mo
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FPGA Verification Engineer, Air Vehicles
Costa Mesa, California, United States
$123k-$171k/yr OnsiteFull Time
Anduril Industries
Anduril Industries: Defense technology building autonomous military hardware and software.
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog, UVM, SVA, industry simulators, Git, Linux; eligible to obtain U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, Python, Tcl, Makefile, SVUnit, Nix
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1w
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FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)
Costa Mesa, California, United States
RemoteFull Time
Hikinex
Hikinex: Provider of outsourced sales and administrative business solutions.
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog/UVM/SVA, experience with industry simulators, Git and Linux, eligible for U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, SVUnit, Python, Tcl, Makefile, Nix
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Principal Engineer Digital Design
Irvine or California or Dallas or Texas
$164k-$241k/yr HybridFull Time
Infineon Technologies
Infineon TechnologiesFrankfurt Stock Exchange: IFX: Designs and manufactures semiconductors for power and IoT systems.
12+ YOEBachelor's degree in EE/Computer Engineering, 12+ years RTL design experience (Verilog/System Verilog), DSP algorithm implementation, fixed-point math, MATLAB/C/C++, FPGA/ASIC experience, and familiarity with EDA tools (Synopsys Design Compiler, Cadence).
Verilog, System Verilog, HDL, MATLAB, Simulink, C, C++, Synopsys Design Compiler, Cadence
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
Siemens
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
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