1mo
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Formal Verification Engineer
Austin or Boston or Santa Clara
$156k-$268k/yr HybridFull Time
8+ YOESenior-level role requiring 8+ years in design verification with formal methods; strong SVA and formal verification tool experience; BS/MS in Computer/Electrical Engineering; located in Austin, Boston, or Santa Clara.
VC Formal, JasperGold, SystemVerilog, SVA, TCL, Python, Perl
3mo
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Design Verification Engineer
Waltham, Massachusetts, United States
OnsiteFull Time
10+ YOEBS or higher with 10+ years in digital verification; strong SystemVerilog, verification methodologies (UVM), Python/Perl; hardware/SOC DV experience.
SystemVerilog, Python, Perl, C++, C, UVM, Debugging, Digital Verification
3mo
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GPU Verification Engineer
Westford, Massachusetts, United States
$136k-$265k/yr OnsiteFull Time
2+ YOEBachelor's degree (or equivalent) in EE/CE/CS, 2+–5+ years verification experience, proficiency in C/C++ and scripting (Perl/Python/shell), strong debugging and architecture/memory-model knowledge, VCS/emulation/FPGA exposure.
C, C++, Perl, Python, Shell, VCS, emulation, FPGA
3mo
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GPU Verification Engineer
Westford, Massachusetts, United States
OnsiteFull Time
2+ YOEBachelor's in Electrical/Computer Engineering or Computer Science; 5+ years experience or 2+ years with Bachelor's; proficient in C/C++, scripting; strong debugging and problem solving; knowledge of computer architecture; exposure to verification tools; good communication.
C/C++, Perl, Python, Shell, VCS, Emulation, FPGA
1w
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Staff Engineer, Design Verification Engineering
Wilmington, Massachusetts, United States
$172k-$210k/yr HybridFull Time
4+ YOEMaster's+4yrs or Bachelor's+6yrs in relevant engineering; experience with System Verilog and UVM, metric-driven verification, simulation debug, IP/VIP integration, verification planning, and scripting for automation.
UVM, System Verilog
1mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
3mo
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GPU Design Verification Engineer
San Diego or Santa Clara or Boxborough or Austin
$162k-$273k/yr OnsiteFull Time
2+ YOEBachelor's +4 yrs (or Master's +3 / PhD +2) in Comp Eng/CS/EE; experience in hardware/software/systems engineering; verification skills with System Verilog/UVM, Verilog/VHDL, C/C++; scripting and emulation exposure preferred.
System Verilog, UVM, Verilog, VHDL, C/C++, Python, Make, Airflow, Veloce, Palladium, Zebu, FPGA, Protium, HAPS, qemu, GNU Toolchain, Visual Studio, gdb, uboot, uefi, Vulkan, DX11, DX12, Windows, Linux
1mo
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Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$128k-$189k/yr OnsiteFull Time
2+ YOEBachelor's/Master's/PhD in CS/EE or related; 2–5 years verification experience; strong UVM, constrained-random, coverage, SVA, RTL simulation, C/C++, Python/Perl, and Linux skills.
UVM, SVA, RTL, C/C++, Python, Perl, Linux, AMBA, PCIe, Ethernet
1mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
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ASIC/FPGA Verification Engineer IV
Denver or Highlands Ranch or Sunnyvale or Cambridge
$124k-$246k/yr OnsiteFull Time
5+ YOEBachelors in EE (or equivalent), 5+ years FPGA/ASIC verification experience, UVM/SystemVerilog/VHDL/Verilog expertise, experience with modern verification methodologies and tools, and ability to obtain DoD Secret clearance (US citizenship required).
SystemVerilog, Universal Verification Methodology (UVM), VHDL, Verilog, Linux, Microsoft Project, JIRA, Python, OVM, VMM
3mo
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Principal Electrical Engineer-FPGA Verification
Tewksbury or Marlborough
$108k-$205k/yr OnsiteFull Time
8+ YOE8+ years in digital design verification; SystemVerilog; UVM; FPGA verification; DoD/DoD-style security clearance.
SystemVerilog, UVM, AXI, PCIe, Ethernet, DDR, Questa, VCS, Xcelium, Git, ClearCase, SVN, Vivado, Quartus, Python, Tcl, Perl, VHDL, SLURM
1mo
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Staff Design Verification Engineer – Coherent Interconnect
Boston or Austin
OnsiteFull Time
7+ YOELead verification for cache-coherent interconnect; 7+ years ASIC/SoC verification; SystemVerilog/UVM expertise; strong debugging and collaboration skills.
SystemVerilog, UVM, Verilog, Python
1w
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Hardware Verification Engineer — Electro-Optic Links
Boston or Mountain View
$195k-$250k/yr HybridFull Time
8+ YOE8+ years experience leading verification of high-speed electro-optic/serial links; hands-on lab characterization; expertise with SerDes, signal integrity, and automation using Python/MATLAB.
Python, MATLAB, VNA, BERTs, TDRs, ADS, HFSS, Cadence, COMSOL
2w
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Embedded System Verification Engineer - Medical Devices
Westford or Burlington
$69k-$162k/yr OnsiteFull Time
3+ YOEBachelor's degree, 3+ years medical device development experience, verification/testing of embedded hardware systems, knowledge of IEC 60601/62304/ISO 13485/14971, proficiency with Python and LabVIEW, instrumentation experience.
Python, LabVIEW, Oscilloscope, Multimeter, Signal generator
1mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Nashua or Manchester or Largo or New Hampshire or Florida or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree (or equivalent) with 8+ years experience; ability to obtain Secret clearance; expertise in SystemVerilog/UVM, OVM, VHDL, FPGA/ASIC verification and tools; experience with Mentor Questa or Cadence; strong communication and leadership.
SystemVerilog/UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, MATLAB, Simulink
3w
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
3w
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Functional Verification Applications Engineer - Boston/Baltimore/Raleigh - Job Detail | Careers Marketplace - Siemens
Boston or Burlington or Marlborough or Cary or Baltimore or Raleigh
$125k-$251k/yr HybridFull Time
3+ YOEBachelor's in Engineering/CS (or equivalent) with 3+ years; expertise in ASIC & FPGA design and verification, advanced verification methodologies; coding in Verilog/VHDL/SystemVerilog, UVM, PSL/SVA; familiarity with EDA tools, Verification IP, Formal, Emulation; US citizenship required.
Verilog, VHDL, SystemVerilog, UVM, PSL/SVA, Verification IP, Formal, Emulation, EDA, APIs
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Design Verification Engineer, PLM
Portsmouth, New Hampshire, United States
OnsiteFull Time
2+ YOEBachelor's in engineering and 2+ years experience in design, development, and testing; knowledge of design control, validation, and regulatory standards; proficiency with test documentation and engineering change processes.
Azure DevOps, JIRA, Greenlight Guru, SAP
1mo
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Design Verification & Test Development Engineer
Bedford, Massachusetts, United States
$64k-$92k/yr OnsiteFull Time
3+ YOE3+ years developing and executing test methods for electromechanical products; BS in Engineering; Python and data analysis (Pandas, NumPy, Matplotlib); experience with test equipment (LabVIEW, PLC, Raspberry Pi, HALT/thermal/vibration chambers); strong communication and problem solving.
Python, Pandas, NumPy, Matplotlib, PLC, Raspberry Pi, LabVIEW, C#, HALT chambers, thermal chambers, vibration tables, power analyzers, pneumatics, oscilloscopes, multi-meters, AI
1w
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Senior Robotics Verification & Validation (V&V) Engineer
Boston or Raynham
$92k-$148k/yr HybridFull Time
3+ YOEBachelor's or master's in engineering,3+ years V&V in medical devices,knowledge of embedded/firmware/testing,requirements tools and test automation,strong technical writing and systems engineering skills.
DOORS, Jama, Polarion, Python, LabVIEW, MATLAB, SAP Product Lifecycle Management
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