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223 verification engineer jobs at 66 companies in Compton, CA

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Design Verification Engineer
Los Angeles or San Diego
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
3+ YOEBachelor's degree required; 3+ years in hardware verification preferred; SystemVerilog/UVM expertise; test-benches, DV methodology, and verification environments; experience with PCIe/USB, DDR protocols; scripting in Python/Perl/TCL; C/C++ knowledge.
SystemVerilog, UVM, Simulators, Waveform Viewers, Python, Perl, TCL, C/C++
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Design Verification Engineer - Early Career
Santa Clara or Irvine
$87k-$130k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
1+ YOEBachelor’s or Master’s in Electrical/Computer Engineering with 1–3 years experience; Verilog/VHDL; Linux and Python; PCB/architecture knowledge; experience with UVM and ASIC verification.
Verilog, VHDL, UVM, Synopsys, Cadence, Mentor Graphics, Linux, Python, PCIe, Memory Architecture
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Senior Verification Engineer
Arlington or Seal Beach
$146k-$234k/yr OnsiteFull Time
Peraton
Peraton: National security and mission-critical government technology services provider.
7+ YOELead and execute software and system-level testing, develop test plans and automated scripts, verify integrated system behavior, track defects, and support release readiness; requires extensive software testing and technical leadership experience.
Selenium, Cypress, Jira, Jenkins, Gitlab, Ansible, Amazon Web Services (AWS), Kubernetes, Docker, Postgres, MySQL, Linux
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FPGA Verification Engineer II
El Segundo, California, United States
$118k-$142k/yr OnsiteFull Time
CesiumAstro
CesiumAstro: Develops phased array communication systems for satellites and aircraft.
2+ YOEBS/MS in CS/EE/CE, 2+ years verification and automation experience, proficiency with VHDL/Verilog/SystemVerilog, UVM/UVMf, DPI-C, TLM, QEMU, VIP, Linux, MATLAB/Python, and Xilinx tools; CI and regression experience.
VHDL, Verilog, SystemVerilog, C, C++, SystemC, UVM, UVMf, DPI-C, TLM, Formal CDC, QEMU, QEMU-RP, VIP, MATLAB, Python, Linux, Xilinx
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Principal Design Verification Engineer (Silicon Engineering)
Sunnyvale or Austin or Irvine or Redmond
$210k-$310k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
10+ YOEBachelor’s in electrical/computer engineering or computer science; 10+ years in design verification and test bench development.
UVM, OVM, VMM, Python, RTL
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FPGA Verification Engineer, Air Vehicles
Costa Mesa, California, United States
$123k-$171k/yr OnsiteFull Time
Anduril Industries
Anduril Industries: Defense technology building autonomous military hardware and software.
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog, UVM, SVA, industry simulators, Git, Linux; eligible to obtain U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, Python, Tcl, Makefile, SVUnit, Nix
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
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ASIC Design Verification Engineer
Los Angeles or United States
$130k-$200k/yr OnsiteFull Time
K2 Space
K2 Space: Develops high-power satellite platforms for heavy-lift launch vehicles.
3+ YOEB.S./M.S. in EE/CE or related, 3+ years ASIC/SoC verification experience, SystemVerilog/UVM/SVA, simulation and waveform tools (VCS, Xcelium, Questa, Verdi, SimVision), scripting (Python/Perl/TCL), and Git.
SystemVerilog, UVM, SystemVerilog Assertions (SVA), VCS, Xcelium, Questa, Verdi, SimVision, Python, Perl, TCL, Git, APB, AHB, AXI
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System Verification Engineer
Los Angeles, California, United States
$120k-$150k/yr OnsiteFull Time
Apex
Apex: Mass-manufactures standardized satellite buses for commercial and government use.
2+ YOEUS person with BS in Aerospace, Mechanical, Systems or related field; 2+ years in system integration, test, and qualification; strong problem-solving, organization, and communication skills.
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Senior ASIC Design Verification Engineer - Terawave
Los Angeles or Seattle or California or Washington or Texas or United States
$230k-$323k/yr RemoteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
8+ YOEBS/MS in EE/CE, 8+ years ASIC/SoC verification experience, deep System Verilog and UVM expertise, verification planning, coverage closure, RTL/debugging, cross-functional collaboration.
System Verilog, UVM, RTL
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Senior Software Verification & Validation Engineer
Irvine, California, United States
OnsiteFull Time
Fortive
FortiveNYSE: FTV: Manufactures professional instrumentation, industrial tools, and specialized software.
3+ YOEBachelor's in a technical discipline, 3+ years embedded software V&V or system testing, experience with requirements-based verification, Python scripting, test documentation, and cross-functional collaboration.
Python, JIRA, Azure DevOps, Polarion, Jama, Windows, Microsoft Word, Microsoft Excel, Microsoft PowerPoint, Microsoft Outlook, multimeter, oscilloscope, function generator, logic analyzer
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3mo
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Lead Verification & Validation Engineer
Palo Alto or Irvine
$130k-$155k/yr OnsiteFull Time
ALTEN
ALTENEuronext Paris: ATE: Provides engineering and technology consulting services to industrial clients.
5+ YOELead V&V strategy, mentor engineers, design/test automation, and oversee automotive software/system validation.
CAN, LIN, Ethernet, FlexRay, dSPACE, Vector VT, DBC, LDF, ARXML, HIL, MATLAB, Python, C/C++, Automotive testing tools
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Sr. Satellite Design Verification Engineer, Amazon Leo
Irvine or Austin or Sunnyvale or Redmond or San Diego
OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
7+ YOEBachelor's in Electrical/Communications Engineering; 3+ years UVM/SystemC/DPI-C; 7+ years verification in communications; preferred advanced degree; Matlab familiarity; DV/integration experience.
UVM, C, SystemC, DPI-C, Matlab
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2w
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Principal Systems Engineer - Requirements & Verification
San Diego or El Segundo or Palmdale
$114k-$171k/yr OnsiteFull Time
Northrop Grumman
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
1+ YOEBachelor's in STEM +5 yrs, Master's +3 yrs, or PhD +1 yr; active Top Secret clearance (or background within 6 years); ability to obtain SAP clearance; experience in requirements decomposition, verification, integration, ICDs, system test, DOORS and Atlassian tools.
DOORS, Atlassian Tool Suite, Agile Design Methodology
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3w
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Associate ASIC/FPGA Design or Verification Engineer
El Segundo or Huntington Beach or Fairfax
$99k-$133k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designing and manufacturing commercial aircraft and defense systems.
2+ YOEUS citizenship and ability to obtain U.S. Secret clearance; BS in engineering or related field; experience with ASIC/FPGA design or verification and HDL (Verilog/VHDL/System Verilog); familiarity with verification methodologies and scripting.
Verilog, VHDL, System Verilog, System Verilog Assertions, UVM, Palladium, Make, Perl, Python, svn, cvs, git, Linux, JESD204C, PCIe, Ethernet
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ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)
El Segundo or Huntington Beach or Fairfax
$120k-$239k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designs and manufactures aircraft, defense systems, and space technology.
5+ YOEBachelor's in engineering or related field, 5+ years ASIC/FPGA verification experience, proficiency in SystemVerilog/UVM, OOP principles, coverage and code-coverage closure, waveform debug, revision control, and Linux.
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python
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Senior ASIC/FPGA Verification Engineer (Onsite)
El Segundo or Fullerton
$96k-$182k/yr OnsiteFull Time
RTX
RTXNYSE: RTX: RTX provides advanced aerospace and defense systems and services.
5+ YOEActive transferable U.S. SECRET clearance and U.S. citizenship, STEM degree (BS or advanced) with 5+ years (BS) or 3+ years (advanced) experience, RTL verification using VHDL/Verilog/SystemVerilog, testbench and coverage, and revision control (Git/Subversion).
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, QuestaSim, Synplify, Quartus, Vivado, Unix, Linux
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Sr. Principal AMS Verification Engineer (Irvine, CA, US)
Irvine, California, United States
$143k-$286k/yr OnsiteFull Time
Skyworks Solutions
Skyworks SolutionsNASDAQ: SWKS: Designs and manufactures analog and mixed-signal semiconductor solutions.
8+ YOERequires BS+15 yrs (MS+12 or PhD+8) experience; strong AMS design/verification background, Verilog-A and SystemVerilog RNM modeling, Cadence Virtuoso/ADS experience, Python scripting, leadership and communication skills.
Cadence Virtuoso, ADS, Verilog-A, SystemVerilog, SystemVerilog Real Number Modeling (RNM), Python
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Senior Software Verification & Validation Engineer
Irvine, California, United States
$88k-$147k/yr OnsiteFull Time
Fortive
FortiveNYSE: FTV: Industrial technology conglomerate providing critical instrumentation, software, and safety solutions.
3+ YOEBachelor's in engineering or CS,3+ years embedded/software V&V experience,requirements-based testing,Python automation,defect tracking tools (JIRA,Azure DevOps,Polarion,Jama),Windows and Microsoft Office proficiency.
Python, JIRA, Azure DevOps, Polarion, Jama, Windows, Microsoft Word, Microsoft Excel, Microsoft PowerPoint, Microsoft Outlook, multimeter, oscilloscope, function generator, logic analyzer
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6d
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Senior/Principal Full-Chip Physical Verification Engineer
San Jose or Irvine
$150k-$250k/yr OnsiteFull Time
Celero Communications
Celero Communications: Developing high-performance coherent DSP technology for AI connectivity.
7+ YOE7+ years full-chip physical verification experience, BS in Electrical Engineering (MS preferred), hands-on with ICV or Calibre, DRC/ERC analysis, tapeout experience, floorplanning expertise; Tcl/Python/shell scripting preferred.
ICV, Calibre, Tcl, Python, shell
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