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FPGA Engineer (CA, San Jose)
San Jose, California, United States
HybridFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience in FPGA design and verification, proficiency in RTL/C/C++, Python; familiarity with VHDL/Verilog, hardware security, IP core development, and FPGA tools.
C, C++, Python, VHDL, Verilog, Tcl, Vivado, GHDL, Questa, Quartus Prime, Xilinx, Altera, Versal, Stratix, Avalon, AXI, ACE, IP cores, cocotb, pyuvm
1mo
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FPGA Silicon Validation Engineer
San Jose, California, United States
$106k-$154k/yr OnsiteFull Time
3+ YOEBachelor's degree in electrical engineering (or related) plus 3 years' industry experience; FPGA architecture knowledge; experience with C and Python preferred; hands-on debug with oscilloscopes and power supplies; internship/work experience preferred.
FPGA, RTL, C, Python, oscilloscope, power supply
1mo
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Senior FPGA Design Engineer
San Jose, California, United States
$150k-$200k/yr OnsiteFull Time
5+ YOEStrong RTL FPGA design experience with Vivado and Protocompiler; FPGA/IP integration; 5+ years; PCIe/USB/Ethernet; BS/MS in EE/EECS/CS; English.
Vivado, Protocompiler, IP Integration, PCIe, USB, Ethernet, SPI
1mo
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FPGA Engineer Engineer (eInfochips)
San Jose or Austin
OnsiteFull Time
9+ YOE9+ years experience; proficient in Verilog/System Verilog, EDA tools (VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus), IPXACT, UPF, PCIe/AXI/APB, ARM fabric; scripting with Python/Tcl/Perl; timing signoff and clock-crossing expertise.
Verilog, System Verilog, Python, Tcl, Perl, VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus, IPXACT, UPF
1w
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Senior FPGA Design Engineer,( Nextest, San Jose, CA)
San Jose, California, United States
$170k-$273k/yr OnsiteFull Time
8+ YOEB.S. or M.S. in Electrical Engineering, 8+ years relevant experience, RTL/Verilog, FPGA transceiver and timing experience, C/C++, EM/FPGA tool flow familiarity, lab equipment experience.
C, C++, Linux, Windows, Verilog HDL, Intel FPGA tool flows, Xilinx FPGA tool flows, UVM, ATE
5d
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FPGA Product Application Engineer
Longmont or San Jose
$116k-$199k/yr HybridFull Time
Provide embedded Ethernet support for FPGA/SoC/ACAP devices; debug HW/SW designs; build PetaLinux/Yocto images; modify device trees; develop Linux/bootloader solutions; program in C/C++/Python; bachelor\u0002s in electrical/computer engineering required.
Xilinx, FPGA, SoC, ACAP, PetaLinux, Yocto, Device Tree, FSBL, U-Boot, Linux kernel, QEMU, XEN, Vitis, C, C++, Python, shell
1mo
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Senior Engineer, RTL Design
San Jose, California, United States
$138k-$206k/yr OnsiteFull Time
5+ YOEBS with 5 years RTL development or MS with 3 years; PhD in Computer/Electrical Engineering; HDL/Verilog; FPGA; PCIe/CXL/NVMe; CAD tools.
Verilog, HDL, CAD tools, Synopsys, Mentor, Cadence, FPGA, PCIe, CXL, NVMe, AXI, DDR4/5, Ethernet
1mo
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Engineer, SIG Electrical Design
San Jose, California, United States
$151k-$191k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering or related with 2+ years experience. Experience with PCB design, FPGA/PCIe/DDR interfaces, analog and power design, HyperLynx simulations, lab debugging tools, SSD test equipment, DFM/DFT support.
HyperLynx, FPGA, PCIe, DDR, PCB, Oscilloscope, Digital Multimeter, Logic Analyzer, Power Supply, Probes
1mo
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Engineer, SIG Electrical Design
San Jose, California, United States
$151k-$191k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering (or related) and 2 years experience; PCB, digital (FPGA), analog and power supply design; signal/power integrity analysis (HyperLynx); PCIe/DDR expertise; lab debugging and SSD test equipment experience.
HyperLynx, FPGAs, PCIe, DDR, Oscilloscopes, Digital multi-meters, Power supplies, Probes, Logic analyzers, SSD test equipment
2w
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Staff Application Engineer
San Jose, California, United States
$145k-$180k/yr HybridFull Time
5+ YOEBSEE (MSEE preferred). 5+ years in analog/digital/mixed-signal and power electronics, configurable devices (GreenPAK/FPGA/Verilog), IC prototyping and bench-debug skills, strong technical communication.
GreenPAK, FPGA, Verilog
2mo
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Sr. Power Electronics Engineer
San Jose or San Francisco
$140k-$300k/yr HybridFull Time
7+ YOE7+ years in power electronics design and leadership; strong topologies knowledge; experience with PSIM/Matlab/Spice; digital control in MCU/DSP/FPGA; cost and reliability focus.
PSIM, MATLAB, SPICE, MCU, DSP, FPGA, Oscilloscope, RLC Analyzer, Impedance Analyzer, Spectrum Analyzer, Electronic Loads, Signal/Power Generator
1mo
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Principal Design Verification Engineer |Afshin| SJC/ TDC
Toronto or San Jose
$140k-$175k/yr OnsiteFull Time
8+ YOEBachelor's in Electrical Engineering required (Master's preferred); ≥8 years SoC/silicon verification experience; proficiency in UVM, System Verilog, C/C++; DPI/PLI, Perl/Python scripting; experience with VIPs and protocols (PCI-Express, Ethernet, Infiniband, DDR, NVMe); FPGA and memory technology experience.
UVM, System Verilog, C, C++, DPI, PLI, Perl, Python, PCI-Express, Ethernet, Infiniband, DDR4, DDR5, HBM, NVMe, USB, FPGA, u-boot
2mo
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Component Engineer - Semiconductor Devices
San Jose, California, United States
$136k-$193k/yr HybridFull Time
2+ YOEBachelor's in Electrical/Computer Engineering; 2+ years in semiconductors; 4+ preferred; experience with ASICs/XPUs/FPGAs/PHYs/SerDes; knowledge of PCIe/MDIO/SPI/I2C; cross-functional collaboration.
PCIe, MDIO, SPI, I2C, High-speed design
1mo
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Sr. Hardware Engineer, Networking Swtich (San Jose, California, United States)
San Jose, California, United States
$155k-$175k/yr OnsiteFull Time
8+ YOEBachelor's in EE or related, 8+ years hardware design for networking/server/HPC; PCB schematic/layout, SI/PI, thermal co-design, hardware bring-up, validation, ASIC/FPGA/CPLD experience, CPO/optics, Linux familiarity.
Oscilloscope, Logic Analyzer, Protocol Analyzer, Linux, Verilog, ASIC, FPGA, CPLD
1mo
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Quantum Error Correction Control Systems Engineer
Yorktown Heights or San Jose or Cambridge
$157k-$219k/yr HybridFull Time
Bachelor's degree required. Experience with prototyping, resource estimation, or real-time software; strong software skills in Python, Rust, or C++; collaboration with cross-disciplinary teams. Preferred: quantum information, RF/microwave control systems, FPGA/HDL.
Python, Rust, C++, FPGA, HDL, RF, microwave
3w
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Senior Technical Staff Engineer - Validation (System Design)
San Jose or United States
$91k-$232k/yr OnsiteFull Time
15+ YOEBSEE/BSCS with 15+ years experience (MSEE/MSCS preferred). Deep FPGA architecture and system-level validation experience; RTL in Verilog/VHDL, C/C++; ModelSim/Synplicity; lab debug and protocol expertise (PCIe, Ethernet, SERDES).
FPGA, Verilog, VHDL, C, C++, ModelSim, Synplicity, Synopsys Identify, Xilinx Chipscope, Altera Signalscope, Lattice Reveal, Spirent Test Center, PCIe Analyzer, PCIe Exerciser, Python, PERL, TCL, JTAG, SVF, 1532, STAPL, PCIe Gen3/4/5, SERDES, Ethernet, SPI, I2C, UART, USB, PCI
1mo
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Design Verification Engineer
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
12+ YOEBachelor's in EE/electronic engineering or CS required; 12+ years experience; strong System Verilog, UVM/OVM, RTL, C/C++, Perl, SystemC skills; ASIC design verification, debugging, and coverage experience; US work authorization required.
System Verilog, UVM, OVM, RTL, C/C++, Perl, SystemC, Emulators, FPGA
5d
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Field Application Engineer- AMD/ Xilinx
San Jose, California, United States
$150k-$210k/yr HybridFull Time
8+ YOE8+ years experience with FPGA/SoC systems, expertise with Xilinx/AMD devices and tools, strong customer-facing technical skills, bachelor\u0002s degree in EE/CS or equivalent.
Vivado, Vitis, ISE, Quartus, ModelSim, Eclipse, Yocto, Linux
1mo
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Embedded Hardware Engineer
San Jose or Pittsburgh
$160k-$210k/yr OnsiteFull Time
8+ YOE8+ years PCB design and embedded software experience, 5+ years C/C++, experience with silicon bring-up, board bring-up, boot ROM/firmware, RTL/FPGA validation, and embedded platforms (MSP430, STM32, Ambiq Apollo, PIC32).
C, C++, MSP430, STM32, Ambiq Apollo, PIC32, Altium Develop, RTL simulators, FPGA emulators
1mo
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Sr. Aircraft Software Integration Engineer
San Jose or Salinas
$144k-$180k/yr OnsiteFull Time
6+ YOE6+ years with real-time embedded systems, BS in relevant engineering, experience with flight controls/avionics, systems integration and verification, lab hardware/software integration, C, MATLAB/Simulink, bash/Python, and familiarity with communication protocols.
C, MATLAB/Simulink, bash, Python, RS-422/485, CAN, ARINC-429, AFDX, Ethernet, TCP/IP, System Load Manager (SLM), oscilloscope, bus analyzer, FPGAs, VHDL, Verilog, RTOS
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